1. Field of the Invention
The present invention relates to a method of improving a data retention ability of a semiconductor memory device that includes nonvolatile memory cells, and a semiconductor memory device. More specifically, the present invention relates to a semiconductor memory device in which nonvolatile semiconductor memory cells, each including a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed under the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having the function of retaining charges, are arranged, a method of improving a data retention ability of the semiconductor memory device including the nonvolatile memory cells, and a portable electronic apparatus.
2. Description of the Related Art
Conventionally, a flash memory has been typically used as a nonvolatile memory.
As shown in FIG. 22, in such a flash memory, a floating gate 902, an insulating film 907 and a word line (control gate) 903 are formed in this order on a semiconductor substrate 901 via a gate insulating film. On both sides of the floating gate 902, a source line 904 and a bit line 905 are formed in diffusion regions, thereby forming a memory cell. Around the memory cell, a device isolation region 906 is formed (see, for example, Japanese Unexamined Patent Publication No. Hei 5-304277 (1993)).
The memory cell retains data according to a charge amount in the floating gate 902. In a memory cell array constructed by arranging memory cells, by selecting a specific word line and a specific bit line and applying a predetermined voltage, an operation of rewriting/reading a desired memory cell can be performed.
In such a flash memory, when a charge amount in the floating gate changes, a drain current (Id)-gate voltage (Vg) characteristic as shown in FIG. 23 is displayed. In FIG. 23, a solid line shows the characteristics in a writing state while a dashed line shows the characteristics in an erasing state. When the amount of negative charges in the floating gate increases, the threshold increases, and an Id-Vg curve shifts almost in parallel in the direction of increasing Vg.
However, in the above-described flash memory, it has been functionally necessary to dispose the insulating film 907 for separating the floating gate 902 and the word line 903 from each other, and further, it has been difficult to reduce the thickness of the gate insulating film in order to prevent any leakage of charges from the floating gate 902. As a consequence, it has been difficult to effectively reduce the thickness of each of the insulating film 907 and the gate insulating film, thereby inhibiting the microfabrication of the memory cell.